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Catalyst, produced by our Boston-based Industrial/Consumer Division, was a star performer in 1998, with a total of more than 150 systems booked at year-end. A range of analog instrumentation covering the spectrum from audio to microwave, ever more powerful logic, scan, and memory-test performance, and compatibility with the huge installed base of A5 family systems enabled the system to take the market by storm, becoming, in a little over a year on the market, the testing solution of choice for the new “system-on-a-chip” ICs found in single-chip modems, integrated PC audio and graphics devices, networking systems, games, pagers, cell phones, and a wide range of industrial and consumer products. The ability to test system silicon having embedded microprocessors, DSP circuits, and memory cores on a single platform made Catalyst a winner among so-called “fabless” semiconductor producers and silicon foundries, especially in Taiwan, a source of strong year-end orders. Sales also continued to grow in the European market, long a hotbed of wireless activity. One of Catalyst’s most powerful selling points is the access it provides to the constant stream of new instrumentation pouring out of our engineering programs. Added to the long list in 1998 were µWAVE6000, a 6-GHz instrumentation suite for wireless test applications; Catalyst 400, an option that doubles the system’s speed to 400 megabits/second, and DigitalVX Test Simulation Software, which allows engineers to verify chip designs and develop test programs in advance of “first silicon.” To develop these and other capabilities, Teradyne’s Industrial/Consumer Division relies on a corps of several hundred engineers — including, as of 1998, a San Jose-based team of 70 engineers reassigned from our VLSI Test Division to bring even more digital horsepower to Catalyst and its successors. Roughly flat sales of VLSI logic test systems gave us a slight gain in market share in 1998. More than half the revenue came from sales of the J973, in its first full year on the market, as its 400-MHz speed and 100-picosecond accuracy attracted major producers of high-end CISC and RISC microprocessors. In fact, if you were one of the millions of buyers of sub-$1000 personal computers in 1998, the odds are overwhelming that your microprocessor was tested on a J973. Meanwhile, the J971, with an installed base now approaching 500 systems (three customers own more than 50 systems each), continued to score among makers of high-end microcontrollers and mid-range microprocessors. One of the most exciting product introductions in Teradyne’s history was the debut of the Integra J750 Logic Tester in 1998. Programmed on a PC spreadsheet (Microsoft Excel), designed around low-cost CMOS circuitry, and with an architecture created expressly for parallel testing, the compact (see cover) J750 caused a buzz in the market when the first system was shipped in the second quarter, and by year-end more than 50 systems had been booked, to 12 customers. More than half the systems were bound for the microcontroller industry (where tight margins make the J750’s productivity especially compelling), and other customers included a number of fabless semiconductor companies and testing subcontractors in the U.S. and Asia. To exploit the momentum already established by this landmark system, the Integra Division is moving fast to build additional capabilities into the J750 platform (memory and analog test options are already available), and many of the ingenious features of the J750 are already migrating to other Teradyne systems under development. For all makers of memory test systems, Teradyne included, 1998 was a difficult year. Yet we were able to increase sales in this sector by about 10 percent, which, in a market that fell more than 25 percent, was good enough to yield a healthy market-share gain. Our Marlin test system (another of those illustrious 1996 introductions) contributed the bulk of the revenues. Over 100 Marlin systems have now been shipped, most of them in 1998. The system is widely regarded as the most cost-effective DRAM probe tester available — a position strengthened by the 1998 introduction of a new redundancy analysis option called SiARAª. Much publicity justly surrounds the testing challenges presented by the new Rambus memory architecture. The issue is fundamentally one of speed: Rambus is a technique for accelerating the effective speed of a memory to match that of the microprocessor it works with, and this acceleration places the Rambus memory far beyond the range of most existing memory testers. Our response to the challenge is the Aries test system, which features gigabit speed, 1024 pins, and the ability to test 16 Rambus parts in parallel. Initial shipments of this new test system were made during 1998. Kinetrix, the venture carrying Teradyne into the electromechanical end of the semiconductor test business, shipped its first Apollo in-tray sorters in 1998 and configured its in-tray handler, Galileo, for use with the J750 Logic Tester. As the year ended, the J750- Galileo test cell was being readied for evaluation by several major semiconductor manufacturers. |